clash-prelude
Version 0.10.5 revision 0 uploaded by ChristiaanBaaij.
Package meta
- Synopsis
- CAES Language for Synchronous Hardware - Prelude library
- Description
CλaSH (pronounced ‘clash’) is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The CλaSH compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.
Features of CλaSH:
Strongly typed (like VHDL), yet with a very high degree of type inference, enabling both safe and fast prototying using consise descriptions (like Verilog).
Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.
Higher-order functions, with type inference, result in designs that are fully parametric by default.
Synchronous sequential circuit design based on streams of values, called
Signals, lead to natural descriptions of feedback loops.Support for multiple clock domains, with type safe clock domain crossing.
This package provides:
Prelude library containing datatypes and functions for circuit design
To use the library:
Import CLaSH.Prelude
Additionally import CLaSH.Prelude.Explicit if you want to design explicitly clocked circuits in a multi-clock setting
A preliminary version of a tutorial can be found in CLaSH.Tutorial, for a general overview of the library you should however check out CLaSH.Prelude. Some circuit examples can be found in CLaSH.Examples.
- Author
- Christiaan Baaij
- Bug reports
- http://github.com/clash-lang/clash-prelude/issues
- Category
- Hardware
- Copyright
- Copyright © 2013-2015 University of Twente
- Homepage
- http://www.clash-lang.org/
- Maintainer
- Christiaan Baaij <christiaan.baaij@gmail.com>
- Package URL
- n/a
- Stability
- n/a